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Class Summary |
| AndGate |
Represents an AND gate defined by an upper left corner and its width. |
| Demultiplexer |
Represents a multiplexer defined by an upper left corner and its width. |
| DFlipflop |
Represents a D flipflop gate defined by an upper left corner and its width. |
| JKFlipflop |
Represents a JK flipflop defined by an upper left corner and its width. |
| Multiplexer |
Represents a multiplexer defined by an upper left corner and its width. |
| NAndGate |
Represents a NAND gate defined by an upper left corner and its width. |
| NorGate |
Represents a NOR gate defined by an upper left corner and its width. |
| NotGate |
Represents a NOT gate defined by an upper left corner and its width. |
| OrGate |
Represents an OR gate defined by an upper left corner and its width. |
| RSFlipflop |
Represents a RS flipflop defined by an upper left corner and its width. |
| TFlipflop |
Represents a T flipflopgate defined by an upper left corner and its width. |
| VHDLElement |
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| VHDLPin |
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| VHDLWire |
Represents a wire defined by a sequence of nodes. |
| XNorGate |
Represents a XNOR gate defined by an upper left corner and its width. |
| XOrGate |
Represents a XOR gate defined by an upper left corner and its width. |